Brain-Inspired Architectures & Systems

1. N. -D. Nguyen, K. N. Dang, A. B. Ahmed, A. Ben Abdallah and X. -T. Tran, "NOMA: A Novel Reliability Improvement Methodology for 3-D IC-based Neuromorphic Systems," in IEEE Transactions on Components, Packaging and Manufacturing Technology, doi: 10.1109/TCPMT.2024.3488113. keywords: {Circuit faults; Reliability; Accuracy; Neurons;Neuromorphics;Hardware;Noise;Fault tolerant systems;Fault tolerance;Power supplies;Spiking Neural Networks;3-D IC-based Neuromorphic System;Fault Tolerance;Network-of-Memory},

2. M. Maatar, Z. Wang, K. N. Dang and A. Ben Abdallah, "BTSAM: Balanced Thermal-State-Aware Mapping Algorithms and Architecture for 3D-NoC-Based Neuromorphic Systems," in IEEE Access, vol. 12, pp. 126679-126692, 2024, doi: 10.1109/ACCESS.2024.3425900. keywords: {Neuromorphics;Neurons;Synapses;Three-dimensional displays;Routing;Task analysis;Heat sinks;Genetic algorithms;Neuromorphic systems;mapping;thermal-state-aware;3D-NoC;genetic algorithm},

3. K. N. Dang, N. A. V. Doan, N. -D. Nguyen and A. Ben Abdallah, "HeterGenMap: An Evolutionary Mapping Framework for Heterogeneous NoC-Based Neuromorphic Systems," in IEEE Access, vol. 11, pp. 144095-144112, 2023, doi: 10.1109/ACCESS.2023.3345168. keywords: {Neural networks;Neuromorphics;Genetic algorithms;Task analysis;Routing;Hardware;Synapses;Fault tolerance;Network-on-chip;Fault-tolerance;spiking neural network;neuromorphic system;network-on-chip;max flow;migration}

4. N. -D. Nguyen, A. B. Ahmed, A. Ben Abdallah and K. N. Dang, "Power-Aware Neuromorphic Architecture With Partial Voltage Scaling 3-D Stacking Synaptic Memory," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, no. 12, pp. 2016-2029, Dec. 2023, doi: 10.1109/TVLSI.2023.3318231. keywords: {Computer architecture;Stacking;Hardware;Memory management;Neuromorphics;Power demand;Threshold voltage;3-D-IC-based stacking memory;low-power;neuromorphic system;power-gating;spiking neural networks (SNNs);voltage scaling}

5. W. Y. Yerima, K. N. Dang and A. Ben Abdallah, "R-MaS3N: Robust Mapping of Spiking Neural Networks to 3D-NoC-Based Neuromorphic Systems for Enhanced Reliability," in IEEE Access, vol. 11, pp. 94664-94678, 2023, doi: 10.1109/ACCESS.2023.3311031. keywords: {Neurons;Hardware;Neuromorphics;Fault tolerant systems;Circuit faults;Reliability;Three-dimensional displays;Clustering methods;Reliable neuromorphic;mapping;neural reuse;3D-NoC;clustering},

6. N. -D. Nguyen, X. -T. Tran, A. Ben. Abdallah and K. N. Dang, "An In-Situ Dynamic Quantization With 3D Stacking Synaptic Memory for Power-Aware Neuromorphic Architecture," in IEEE Access, vol. 11, pp. 82377-82389, 2023, doi: 10.1109/ACCESS.2023.3301560. keywords: {Hardware;Computer architecture;Neurons;Biological neural networks;Three-dimensional displays;Power demand;Neuromorphic engineering;Spiking neural network;3D IC-based stacking memory;digital neuromorphic},O. M. Ikechukwu, K. N. Dang and A. B. Abdallah, "On the Design of a Fault-Tolerant Scalable Three Dimensional NoC-Based Digital Neuromorphic System With On-Chip Learning," in IEEE Access, vol. 9, pp. 64331-64345, 2021

7. K. N. Dang, A. B. Ahmed, A. B. Abdallah and X. -T. Tran, "TSV-OCT: A Scalable Online Multiple-TSV Defects Localization for Real-Time 3-D-IC Systems," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 3, pp. 672-685, March 2020

8. Ben Abdallah A, Dang KN. Toward Robust Cognitive 3D Brain-Inspired Cross-Paradigm System. Front Neurosci. 2021 Jun 25;15:690208. doi: 10.3389/fnins.2021.690208. PMID: 34248491; PMCID: PMC8267251.

9. Ogbodo Mark Ikechukwu, Khanh N. Dang and Abderazek Ben Abdallah, “Energy-efficient Spike-based Scalable Architecture for Next-generation Cognitive AI Computing Systems,” Springer Lecture Note in Computer Science (LNCS), International Symposium on Ubiquitous Networking 2021 (UNET21), May 19 – May 22, 2021, Marakesh, Morocco (Best Student Paper Award).

10. The H. Vu, Yuichi Okuyama, Abderazek Ben Abdallah, "Analytical performance assessment and high-throughput low-latency spike routing algorithm for spiking neural network systems,” Journal of Supercomputing 75, pp. 5367–5397 (2019)

11. Ogbodo Mark Ikechukwu, Khanh N. Dang, Tomohide Fukuchi, Abderazek Ben Abdallah, “Architecture and Design of a Spiking Neuron Processor Core Towards the Design of a Large-scale Event-Driven 3D-NoC-based Neuromorphic Processor,” ACM Chapter International Conference on Educational Technology, Language and Technical Communication (ETLTC), January 27-31, 2020, Aizuwakamatsu, Japan.

12. Mark Ogbodo, The Vu, Khanh N. Dang and Abderazek Abdallah, “Light-weight Spiking Neuron Processing Core for Large-scale 3D-NoC based Spiking Neural Network Processing Systems,” The 7th IEEE International Conference on Big Data and Smart Computing, February 19-22, 2020, Pusan, South Korea.

13. Khanh N. Dang and Abderazek Ben Abdallah “An Efficient Software-Hardware Design Framework for Spiking Neural Network Systems,” 2019 IEEE International Conference on Internet of Things, Embedded Systems and Communications (IINTEC 2019), Tunis, Tunisia, 2019, pp. 155-162. DOI: 10.1109/IINTEC48298.2019.9112123.

14. The H. Vu, Abderazek Ben Abdallah, ''A Low-latency K-means based Multicast Routing Algorithm and Architecture for Three Dimensional Spiking Neuromorphic Chips,'' IEEE International Conference on Big Data and Smart Computing (BigComp 2019), Kyoto, Japan, February 28 - March 2, 2019 (Best Paper Award).

Energy Trading and Vehicle-to-Grid (V2G) Networks

1. Kitsum Yiu, Zhishang Wang, Khanh N. Dang and Abderazek Ben Abdallah, ''Integrating Speech Recognition with the Software and Hardware Tool in Software Defined Vehicles'', ETLTC2025, January 2025, Aizu-Wakamatsu
   

2. Kaisei Kaneko, Zhishang Wang, Khanh N. Dang and Abderazek Ben Abdallah, ''Research on Energy Trading System in Vehicle-to-Grid Networks'', ETLTC2025, January 2025, Aizu-Wakamatsu

3. Zhishang Wang, Yuxiao Liang, Achraf Ben Ahmed, Khanh N. Dang, Abderazek Ben Abdallah, "Edge-Driven Dynamic Two-Tier Blockchain for Energy Trading in Vehicle-To-Grid Networks", IEEE Transactions on Vehicular Technolog, (under review)

4. Y. Liang, Z. Wang and A. Ben Abdallah, "Robust Vehicle-to-Grid Energy Trading Method Based on Smart Forecast and Multi-Blockchain Network," in IEEE Access, vol. 12, pp. 8135-8153, 2024

5. Y. Liang, Z. Wang and A. B. Abdallah, "V2GNet: Robust Blockchain-Based Energy Trading Method and Implementation in Vehicle-to-Grid Network," in IEEE Access, vol. 10, pp. 131442-131455, 2022

6. Z. Wang and A. Ben Abdallah, "A Robust Multi-Stage Power Consumption Prediction Method in a Semi-Decentralized Network of Electric Vehicles," in IEEE Access, vol. 10, pp. 37082-37096, 2022

7. Z. Wang, M. Hisada and A. Ben Abdallah, "A Hybrid Clustered Approach for Enhanced Communication and Model Performance in Blockchain-Based Collaborative Learning," in IEEE Access, vol. 12, pp. 16975-16988, 2024

8. Z. Wang, M. Ogbodo, H. Huang, C. Qiu, M. Hisada and A. B. Abdallah, "AEBIS: Al-Enabled Blockchain-Based Electric Vehicle Integration System for Power Management in Smart Grid Platform," in IEEE Access, vol. 8, pp. 226409-226421, 2020

9. Yu Yajima, Zhishang Wang, Abderazek Ben Abdallah, "Robust Collaborative Learning Against Poisoning Attacks in Electric Vehicles Network," ETLTC2023, January 24-27, 2023.

10. H. Huang, M. Ogbodo, Z. Wang, C. Qiu, M. Hisada and A. Ben-Abdallah, "Smart Energy Management System based on Reconfigurable AI Chip and Electrical Vehicles," 2021 IEEE International Conference on Big Data and Smart Computing (BigComp), Jeju Island, Korea (South), 2021, pp. 233-238, DOI: 10.1109/BigComp51126.2021.00051.

3d Network-on-Chip (NoC) and Multicore SoCs

1. K. N. Dang, A. B. Ahmed, A. B. Abdallah and X. -T. Tran, "HotCluster: A Thermal-Aware Defect Recovery Method for Through-Silicon-Vias Toward Reliable 3-D ICs Systems," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 4, pp. 799-812, April 2022

2. K. N. Dang, M. C. Meyer, A. B. Ahmed, A. B. Abdallah and X. -T. Tran, "A Non-Blocking Non-Degrading Multiple Defects Link Testing Method for 3D-Networks-on-Chip," in IEEE Access, vol. 8, pp. 59571-59589, 2020

3. The H. Vu, Yuichi Okuyama, Abderazek Ben Abdallah, “Comprehensive Analytic Performance Assessment and K-means based Multicast Routing Algorithms and Architecture for 3D-NoC of Spiking Neurons,” ACM Journal on Emerging Technologies in Computing Systems (JETC)

4. T. H. Vu, O. M. Ikechukwu and A. Ben Abdallah, "Fault-Tolerant Spike Routing Algorithm and Architecture for Three Dimensional NoC-Based Neuromorphic Systems," in IEEE Access, vol. 7, pp. 90436-90452, 2019

5. K. N. Dang, A. B. Ahmed, A. B. Abdallah and X. -T. Tran, "A Thermal-Aware On-Line Fault Tolerance Method for TSV Lifetime Reliability in 3D-NoC Systems," in IEEE Access, vol. 8, pp. 166642-166657, 2020

6. Wang, Jiangkun, Ogbodo Mark Ikechukwu, Khanh N. Dang, and Abderazek Ben Abdallah, "Spike-Event X-ray Image Classification for 3D-NoC-Based Neuromorphic Pneumonia Detection," Electronics 11, no. 24: 4157

7. Khanh N. Dang, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, "A Low-overhead Soft-Hard Fault Tolerant Architecture, Design and Management Scheme for Reliable High-performance Many-core 3D-NoC Systems,”  Journal of Supercomputing (2017) 73:2705–2729. Keywords: {3D NoCs;Fault-tolerance; Soft–hard faults; Reliability; Architecture · Design}
   

8. Akram Ben Ahmed, A. Ben Abdallah, "Architecture and Design of High-throughput, Low-latency and Fault-Tolerant Routing Algorithm for 3D-Network-on-Chip,” The Journal  of Supercomputing, December 2013, Volume 66, Issue 3, pp 1507-1532. Keywords{3D-NoC ;
   Architecture;
   Fault-tolerance;
   Look-ahead Routing}

9. Akram Ben Ahmed, A. Ben Abdallah, "Architecture and Design of Real-Time Systems for Elderly Health Monitoring," Journal of Embedded Systems, 2017, Vol.9, No.5, pp.484 – 494,  DOI: 10.1504/IJES.2017.10007717. Keywords {Hybrid silicon-photonic NoC · Energy-efficient · Non-blocking photonic switch · Contention-aware · Path configuration}

10. Akram Ben Ahmed, Abderazek Ben Abdallah, "Adaptive Fault-Tolerant Architecture and Routing Algorithm for Reliable Many-Core 3D-NoC Systems", Journal of Parallel and Distributed Computing, Volumes 93–94, July 2016, Pages 30-43, ISSN 0743-7315, doi:10.1016/j.jpdc.2016.03.014. Keywords {3D NoC ; Fault-tolerance ; Robustness ; Architecture ; Dynamic reconfiguration ;Deadlock-free}

11. Akram Ben Ahmed, A. Ben Abdallah,”Graceful Deadlock-Free Fault-Tolerant Routing Algorithm for 3D Network-on-Chip Architectures,” Vournal of Parallel and Distributed Computing, 74/4 (2014), pp. 2229-2240. Keywords {3D-NoC; Architecture; Parallel; Adaptive; Look-ahead routing; Deadlock-free}

12. Abderazek Ben Abdallah, M. Masuda, A. Canedo, K. Kuroda, “Natural Instruction Level Parallelism-aware Compiler for High-Performance QueueCore Processor Architecture,” The Journal of Supercomputing, Volume 57, Number 3, pp. 314-338, Sept. 2011.

13. Akram Ben Ahmed, T. Ouchi, S. Miura, A. Ben Abdallah, “Run-Time Monitoring Mechanism for Efficient Design of Application-specific NoC Architectures in Multi/Manycore Era,” Proc. IEEE 6th International Workshop on Engineering Parallel and Multicore Systems (ePaMuS2013′), July 2013.

14. Akram Ben Ahmed, A. Ben Abdallah, “ONoC-SPL Customized Network-on-Chip (NoC) Architecture and Prototyping for Data-intensive Computation Applications,” IEEE Proceedings of The 4th International Conference on Awareness Science and Technology, pp. 257-262, 2012.

15. A. Ben Ahmed, A. Ben Abdallah, K. Kuroda, “Architecture and Design of Efficient 3D Network-on-Chip (3D NoC) for Custom Multicore SoCs,” IEEE Proc. of the 5th International Conference on Broadband, Wireless Computing, Communication and Applications (BWCCA-2010), Nov. 2010. [Best Paper Award]

16. K. Mori, A. Esch, A. Ben Abdallah, K. Kuroda, “Advanced Design Issues for OASIS Network-on-Chip Architecture,” IEEE Proc. of the 5th International Conference on Broadband, Wireless Computing, Communication and Applications (BWCCA-2010), Nov. 2010, pp. 74-79.

Embedded Machine Learning Systems

1. Jiangkun Wang, Khanh N. Dang and Abderazek Ben Abdallah, “Scaling Deep-Learning Pneumonia Detection Inference on a Reconfigurable Self-Contained Hardware Platform,” 2023 IEEE 6th International Conference on Electronics Technology (ICET), May 12-15, 2023. Best Student Paper Award.

2. Yuuki Okada, Jiangkun Wang, Tomohide Fukuchi and Abderazek Ben Abdallah, "Parallelization and Hardware Mapping of Deep Neural Network on Re-configurable Platform for AI-Enabled Biomedical System," ETLTC2022, January 25-28, 2022.

3. Naoto Ageishi, Fukuchi Tomohide, Abderazek Ben Abdallah, "Real-time Hand-Gesture Recognition based on Deep Neural Network," 3rd ETLTC2021 - ACM Chapter Int. Conference on Information and Comm. Technology, January 27-30, 2021, Aizu-Wakamatsu, Japan, SHS Web of Conferences 102, 04009 (2021), 10.1051/shsconf/202110204009.

4. Miyuka Nakamura, Jiangkun Wang, Sinchhean Phea, Abderazek Ben Abdallah, ''Comprehensive Study of Coronavirus Disease 2019 (COVID-19) Classification based on Deep Convolution Neural Networks,'' 3rd ETLTC2021-ACM Chapter Int. Conference on Information and Comm. Technology, January 27-30, 2021, Aizu-Wakamatsu, Japan, SHS Web of Conferences 102, 04007 (2021), DOI:10.1051/shsconf/202110204007.

5. Okada Yuuki, Jiangkun Wang, Ogbodo Mark Ikechukwu, Abderazek Ben Abdallah, ''Hardware Acceleration of Convolution Neural Network for AI-Enabled Realtime Biomedical System,'' 3rd ETLTC2021-ACM Chapter Int. Conference on Information and Comm. Technology, January 27-30, 2021, Aizu-Wakamatsu, Japan, SHS Web Conf., 102 (2021) 04019, DOI:10.1051/shsconf/202110204019.

6. Tomohide Fukuchi, Ogbodo Mark Ikechukwu, Abderazek Ben Abdallah, ''Design and Optimization of a Deep Neural Network Architecture for Traffic Light Detection,'' ACM Chapter International Conference on Educational Technology, Language and Technical Communication (ETLTC), January 27-31, 2020, Aizuwakamatsu, Japan.

7. The H. Vu, Ryunosuke Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, ''Efficient Optimization and Hardware Acceleration of CNNs towards the Design of a Scalable Neuro-inspired Architecture in Hardware,'' IEEE International Conference on Big Data and Smart Computing (BigComp 2018), Shanghai, China, January 15-18, 2018.

Neuromorphic and Prosthetic Systems

1. Mohamed Maatar, Khanh N. Dang and Abderazek Ben Abdallah, “Thermal-Aware Task-Mapping Algorithm and Architecture for 3D-NoC-Based Event-Driven Neuromorphic System,” 2023 IEEE 6th International Conference on Electronics Technology (ICET), May 12-15, 2023.

2. Cheng Hong, Sinchhean Phea, Khanh N. Dang, Abderazek Ben Abdallah, "The AIzuHand Neuromorphic Prosthetic Hand," ETLTC2023, January 24-27, 2023.

3. Yamato Saikawa, Khanh N. Dang, Abderazek Ben Abdallah, "Multimodal sEMG and Speech-Based Design and Evaluation of a Low-Cost," ETLTC2023, January 24-27, 2023.

4. Mark Ogbodo, Abderazek Ben Abdallah, "Study of a Multi-modal Neurorobotic Prosthetic Arm Control System based on Recurrent Spiking Neural Network," ETLTC2022, January 25-28, 2022.

5. Yamato Saikawa, Abderazek Ben Abdallah, "Study of Deep Learning-based Hand Gesture Recognition Toward the Design of a Low-cost Prosthetic Hand," ETLTC2022, January 25-28, 2022.

6. Masaki Watanabe, Abderazek Ben Abdallah, "A Low-cost Raspberry Pi-based Control System for Upper Limb Prosthesis," ETLTC2022, January 25-28, 2022.

7. Sinchhean Phea, Abderazek Ben Abdallah, "An Affordable 3D-printed Open-Loop Prosthetic Hand Prototype with Neural Network Learning EMG-Based Manipulation for Amputees," ETLTC2022, January 25-28, 2022.

8. Sinchhean Phea, Zhishang Wang, Jiangkun Wang, Abderazek Ben Abdallah, ''Optimization and Implementation of a Collaborative Learning Algorithm for an AI-Enabled Real-time Biomedical System,'' 3rd ETLTC2021-ACM Chapter Int. Conference on Information and Comm. Technology, January 27-30, 2021, Aizu-Wakamatsu, Japan, SHS Web Conf., 102 (2021) 04017, DOI:10.1051/shsconf/202110204017 (Best Paper Award).

Queue Processor Architectures and Compilers

1. Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa, "Compiling for Reduced Bit-Width Queue Processors,” Journal of Signal Processing Systems, Volume 59, Number 1, 45-55, 2010.

2. Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa, "Efficient Compilation for Queue Size-Constrained Queue Processors", Journal of Parallel Computing, Vol.35, pp. 213-225, 2009. Key words{Queue Register File, Queue Processor, Constrained, Optimization,Compiler}

3. Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa, “Design and Implementation of a Queue Compiler”,Journal of Microprocessors and Microsystems, Vol. 33, Issue 2, pp. pp. 29-138, 2009.

4. Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa, "Compiler Support for Code Size Reduction using a Queue-based Processor", Transactions on High-Performance Embedded Architectures and Compilers, Vol. 2, Issue 4, pp. 269-285, 2009. Keywords {Code Generation, Code Size Reduction, Reduced bit-width Instruction Set, Queue Computation Model}

5. Abderazek Ben Abdallah, A. Canedo, T. Yoshinaga, M. Sowa, “The QC-2 Parallel Queue Processor Architecture,” Jnl. of Parallel and Distributed Computing, Vol. 68, No. 2, pp. 235-245, 2008. Keywords{Queue computing; Queue processor; Parallel; Design; Circular queue-register}

6. Md. Musfiquzzaman Akanda, Abderazek Ben Abdallah, and Masahiro Sowa, “Dual-Execution Mode Processor Architecture,” The Journal of Supercomputing, Vol. 44, No. 2, pp. 103-125, 2008. Keywords{Dual-execution · Queue computation · Dynamic switching · Embedded core · Hardware usability · Parallel}

7. A. Acanda, Ben Abdallah, and M. Sowa, "A New Code Generation Algorithm for 2-offset Producer Order Queue Computation Model," Journal of Computer Languages, Systems & Structures, Vol. 34, Issue 4, pp. 184-194, 2007. Keywords{Code Generation; Algorithms; Queue Computation; Level DAG}

8. A. Ben Abdallah, T. Yoshinaga, M. Sowa, “High-Level Modeling and FPGA Prototyping of Produced Order Parallel Queue Processor Core," Jnl. of Parallel and Distributed Computing, Vol. 68, No. 2, pp. 235-245, 2008. Keywords{Queue computing; Queue processor; Parallel; Design; Circular queue-register}

9. Abderazek Ben Abdallah, Sotaro Kawata, Masahiro Sowa, “Design and Architecture for an Embedded 32-bit Queue Core," The Journal of Supercomputing, Vol. 44, No. 2, pp. 103-125, 2008. Keywords{Dual-execution · Queue computation · Dynamic switching · Embedded core · Hardware usability · Parallel}

10. M. Sowa, A. Ben Abdallah, and T. Yoshinaga, “Parallel Processor Architecture Based on Produced Order Computation Model,” The Journal of Supercomputing, Vol. 32, No. 3, pp. 217-229, June 2005. Keywords{produced order, queue processor, high performance, circular queue-registers, design}

11. Abderazek Ben Abdallah, Mudar Sarem, Masahiro. Sowa, “Dynamic Fast Issue Mechanism (DFI) for Dynamic Scheduled Processors,” IEICE Transactions on Fundamentals of Electronics, Communications, and Computer Science, Vol. E83-A No.12 pp.2417-2425, Dec. 2000. keywords: {precise interrupt, write-once, paral lel, register re-naming, out-of-order}

12. A. Ben Abdallah, Markov Arsenji, S. Shigeta, T. Yoshinaga, and M. Sowa, ”Queue Processor for Novel Queue Computing Paradigm Based on Produced Order Scheme,” Proc. IEEE of the 7th High-Performance Computing and Grid in Asia Pacific Region (HPCAsia2004), pp. 169-177, July 2004.

13. A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, ”On the Design of a Register Queue-Based Processor Architecture (FaRM-rq),” Proc. of the International Symposium of Parallel and Distributed Processing and Applications (ISPA 2003), pp.248-262, July 2003.

14. A. Ben Abdallah, and M. Sowa, ”DRA: Dynamic Register Allocator Mechanism for FaRM Microprocessor,” Proc. of the 3rd International Workshop on Advanced Parallel Processing Technologies (APPT’99), pp.131-136, October 1999.

15. Shigeta, L.-Q. Wang, N. Yagishita, A. Ben Abdallah, T. Yoshinaga, and M. Sowa, ”QJava: Integrate Queue Computational Model into Java,” Proc. of the Joint Japan-Tunisia Workshop on Computer Systems and Information Technology (JT-CSIT’04), July 2004.

16. L. Q. Wang, A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, ”QJAVAC: Queue-Java Compiler Design for High Parallelism Queue Java Bytecode,” Proc. of International Technical Conference in Circuits/Systems, Computers and Communications (ITC-CSCC2003), pp. 900-903, July 2003.

17. A. Markovskij, M. Sowa, A. Ben Abdallah, S. Shigeta, and T. Yoshinaga, ”Design of Producer-Order Parallel Queue Processor Architecture,” Proc. of International Workshop on Modern Science and Technology (IWMST 2004), September 2-3, 2004.

18. A. Markovskij, A. Ben Abdallah, S. Kawata, and M. Sowa, ”Architecture of Produced-order Parallel Queue Processor: Preliminary Evaluation,” Proc. of the 38th International Symposium on Microarchitecture (MICRO-38), Nov. 2005.

19. H. Sasaki, Y. Okumura, A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, ”Theoretical Evaluation of Simultaneous Multi-threading Parallel Queue Processor Architecture,” Proc. International Conference on Circuits/Systems, Computers and Communications, July 2004.

Photonic Networks-on-Chip

1. Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, "SAFT-PHENIC: a thermal-aware microring fault-resilient photonic NoC,” The Journal of Supercomputing, Volume 74, Issue 9, pp 4672–4695, 2018. DOI: 10.1007/s11227-018-2463-x Keywords: {Fault tolerant; Optical router; NoCs ; High performance ; Many-coresystems ; Microring ; Thermal variation}

2. A. B. Ahmed, T. Yoshinaga and A. Ben Abdallah, "Scalable Photonic Networks-on-Chip Architecture Based on a Novel Wavelength-Shifting Mechanism," n IEEE Transactions on Emerging Topics in Computing, vol. 8, no. 2, pp. 533-544, 1 April-June 2020, doi: 10.1109/TETC.2017.2737016. keywords: {Photonics;Computer architecture;Routing;Optical switches;Bandwidth;Optical waveguides;Analytical models;Many-cores;scalability;photonic;Network-on-Chip;wavelength-shifting;routing},

3. Achraf Ben Ahmed, Abderazek Ben Abdallah,"An Energy-Efficient High-Throughput Mesh-Based Photonic On-Chip Interconnect for Many-Core Systems,"Photonics 2016, 3(2), 15; https://doi.org/10.3390/photonics3020015. Keywords{ energy efficient; contention aware; photonic NoC; non-blocking photonic switch; path-configuration; many-core SoCs; high-performance}

4. Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, "Microring Fault-resilient Photonic Network-on-Chip for Reliable High-performance Many-core Systems,” The Journal of Supercomputing, Volume 73, Issue 4, pp 1567–1599 , April 2017. doi: 10.1007/s11227-016-1846-0. Keywords{Fault tolerant · Optical router · NoCs · High performance ·Many-core systems · Microring}

5. Achraf Ben Ahmed, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, ''Hybrid Photonic NoC based on Non-blocking Photonic Switch and Light-weight Electronic Router,'' Proc. of the IEEE International Conference on Systems, Man, and Cybernetics (SMC2015), October 9-12, 2015.

6. Michael Meyer, Akram Ben Ahmed, Yuichi Okuyama, Abderazek Ben Abdallah, ''Microring Fault-resilient Optical Router for Reliable Network-on-Chip Systems,'' Proc. of 9th IEEE International Symposium on Embedded Multicore/Manycore SoCs (MCSoC-15), September 2015. 

7. Michael Meyer, Akram Ben Ahmed, Yuki Tanaka, Abderazek Ben Abdallah, “On the Design of a Fault-tolerant Photonic Network-on-Chip,” Proc. of the IEEE International Conference on Systems, Man, and Cybernetics (SMC2015), Oct. 9-12, 2015.

8. Achraf Ben Ahmed, Yuichi Okuyama, Abderazek Ben Abdallah, “Non-blocking Electro-optic Network-on-Chip Router for High-throughput and Low-power Many-core Systems,” Proc. of the World Congress on Information Technology and Computer Applications 2015, June 11-13, 2015.

9. Achraf Ben Ahmed, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, “Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC),” Proc. Of the International Conference on Information Science and Control Engineering, April 2015.

10. Achraf Ben Ahmed, A. Ben Abdallah, “PHENIC: Towards Photonic 3D-Network-on-Chip Architecture for High-throughput Many-core Systems-on-Chip,” IEEE Proceedings of the 14th International Conference on Sciences and Techniques of Automatic control and computer engineering, 2013.

Reliability and Fault-Tolerance

1. Khanh N. Dang, Akram Ben Ahmed, Fakhrul Zaman Rokhani, Abderazek Ben Abdallah, and Xuan-Tu Tran, ''A thermal distribution, lifetime reliability prediction and spare TSV insertion platform for stacking 3D NoCs,'' 2020 International Conference On Advanced Technologies For Communications (ATC), November 8-10, 2020, Nha Trang, Vietnam.

2. Khanh N. Dang, Michael Meyer, Akram Ben Ahmed, Abderazek Ben Abdallah, and Xuan-Tu Tran, ''2D-PPC: A single-correction multiple-detection method for Through-Silicon-Via Faults,'' 2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2019), November 11-14, 2019.

3. Khanh N. Dang, Akram Ben Ahmed, Ben Abdallah Abderazek and Xuan-Tu Tran, ''TSV-IaS: Analytic analysis and low-cost non-preemptive on-line detection and correction method for TSV defects,'' IEEE Symposium on VLSI (ISVLSI) 2019, pp. 301-306, July 15-17, 2019. DOI: 10.1109/ISVLSI.2019.00096.

4. Khanh N. Dang, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, ''Reliability Assessment and Quantitative Evaluation of Soft-Error Resilient 3D NoC System,'' 25th IEEE Asian Test Symposium (ATS’16), November 21-24, 2016.

5. Khanh N. Dang, Yuichi Okuyama, Abderazek Ben Abdallah, ''Soft-Error Resilient Network-on-Chip for Safety-Critical Applications,'' 2016 IEEE International Conference on Integrated Circuit Design and Technology (ICICDT), June 27-29, 2016.

6. Khanh N. Dang, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, “A Soft-Error Resilient 3D Network-on-Chip Router for Highly-reliable Multi-core Systems,” IEEE 7th International Conference on Awareness Science and Technology (iCAST 2015), September 22-24, 2015.

7. Achraf Ben Ahmed, M. Meyer, Y. Okuyama, and A. Ben Abdallah, “Adaptive Error- and Traffic Aware Router Architecture for 3D Network-on-Chip Systems,” IEEE Proceedings of the 8th International Symposium on Embedded Multicore/Manycore SoCs (MCSoC-14), pp. 197-2014, Sept. 2014.

8. Akram Ben Ahmed, A. Ben Abdallah, “Fault-tolerant Routing Algorithm with Deadlock Recovery Support for 3D-NoC Architectures,” IEEE Proceedings of the 7th International Symposium on Embedded Multicore SoCs, Sept. 2013.

9. Akram Ben Ahmed, A. Ben Abdallah, “Low-overhead Routing Algorithm for 3D Network-on-Chip,” IEEE Proc. of The Third International Conference on Networking and Computing (ICNC’12), pp. 23-32, 2012.

10. Akram Ben Ahmed, A. Ben Abdallah, “LA-XYZ: Low Latency, High Throughput Look-Ahead Routing Algorithm for 3D Network-on-Chip (3D-NoC) Architecture,” IEEE Proceedings of the 6th International Symposium on Embedded Multicore SoCs (MCSoC-12), pp. 167-174, 2012.

Processor Architecture and Optimization