FACULTY
Research and Industry-Academia Collaboration
研究・産学連携
DANG Nam Khanh
Associate Professor
- Affiliation
- Department of Computer Science and Engineering/Division of Computer Engineering
- Title
- Associate Professor
- khanh@u-aizu.ac.jp
- Web site
- https://u-aizu.ac.jp/~khanh/
Education
- Courses - Undergraduate
- PL03: JAVA Programming I (Ex.), Q1.
FU05: Computer Architecture (Ex.), Q1.
SE08: Introduction of Big Data Analytics (Ex.), Q3.
FU06: Operating Systems (Ex.), Q4.
- Courses - Graduate
- SYA14: Neuromorphic Computing, Q2.
RPW1: Research Paper Writing I, Q3+Q4.
Research
- Specialization
-
Control and system engineering
Electron device and electronic equipment
Computer system
High performance computing
Computational science
Intelligent informatics
- Neuromorphic Computing
- Machine Learning
- Fault-tolerance
- Edge Intelligence for Disasters
- Educational Background, Biography
-
Educational Background
- Ph.D. in Computer Science and Engineering, The University of Aizu, Japan, 2017
- M.Sc. in Information Systems & Technology, University of Paris-XI, France, 2014
- B.Sc. in Electronics & Telecommunications, VNU University of Engineering and Technology, Vietnam, 2011
Work Experience
- Associate Professor, The University of Aizu, 2022 April - now.
- Assistant Professor, VNU University of Engineering and Technology, Vietnam National University, Hanoi, 2017 November - 2022 March.
- Visiting Researcher, The University of Aizu, 2020 November - 2021 March.
- Visiting Researcher, The University of Aizu, 2019 May - 2019 September.
- Researcher, SISLAB, Vietnam National University, Hanoi, 2011-2014.
- RTL Designer, Dolphin Inc., 2010-2011.
- Current Research Theme
- - Neuromorphic engineering
- Generative AI
- Edge Intelligence for Disasters
- Key Topic
- Neuromorphic Computing, Faul-tolerance, VLSI, 3D Integrated Circuits, Generative AI
- Affiliated Academic Society
Others
- Hobbies
- Football, Chess, Photography
- School days' Dream
- Be a person that can change the world!
- Current Dream
- Be a good teacher & change the world!
- Motto
- Master the Basics, Build the Future—Life's a Marathon, Not a Sprint.
- Favorite Books
- The Fountainhead - Ayn Rand
- Messages for Students
- I firmly believe in mastering the fundamentals before tackling advanced topics. Take the time to read, study, and practice essential subjects like mathematics, English, and programming. This solid foundation will serve you well throughout your career. Remember, it’s better to build a strong base than a fragile structure.
It’s okay to progress slower than your peers for now; with a deep understanding of the basics, you’ll eventually surpass them. Life isn’t a sprint—it’s a marathon. Focus on steady, meaningful growth that will carry you far in the long run.
Main research
- Emerging Interconnect Technologies (Photonics, Three dimensional, Hybrid)
-
Complex SoCs contain dozens of components made of processor cores, DSPs, memory, accelerators, and I/O, all integrated into a single die area of just a few square millimeters. Such complex systems will be interconnected via a complex on-chip interconnect closer to a sophisticated network than current bus-based solutions. This network must provide high throughput and low latency while keeping area and power consumption low. Our research effort is about solving several design challenges to enable such new paradigm in massively parallel many-core systems. In particular, we are investigating fault-tolerance, 3D-TSV integration, photonic communication, low-power mapping techniques, and low-latency adaptive routing.
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- Neuromorphic Computing
-
We are exploring the development of an adaptive ultra-low power neuromorphic chip (NASH) and systems, enhanced by our previously developed fault-tolerant three-dimensional on-chip interconnect technology. The NASH system boasts several features, including an efficient adaptive configuration method that enables the reconfiguration of various SNN parameters such as spike weights, routing, hidden layers, and topology. Additionally, the system incorporates a blend of different deep neural network topologies, an efficient fault-tolerant multicast spike routing algorithm, and an effective on-chip learning mechanism. To demonstrate the performance of the NASH system, we will develop an FPGA implementation and establish a VLSI implementation. The ultimate goal of NASH is to bring brain-inspired processing technology to small-scale embedded sensors and sensor-based devices, such as BCI (EEG/EMG), audio, presence detection, and activity recognition.
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Dissertation and Published Works
Patent:
- A. Ben Abdallah, Khanh N. Dang, An on-chip 3D system in which TSV groups containing multiple TSVs connect layers together [複数のＴＳＶを含むＴＳＶグループが層間を接続するオンチップの３次元システム], 特許第7488989号, Japan patent.
- A. Ben Abdallah, Khanh N. Dang, Masayuki Hisada, TSV Error Tolerant Router Device for 3D Network On Chip, 特許第7239099号, Japan patent,
Selected Publication:
- Ngo-Doanh Nguyen1, Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran, ''NOMA: A Novel Reliability Improvement Methodology for 3-D IC-based Neuromorphic Systems'', IEEE Transactions on Components, Packaging and Manufacturing Technology, 2024 (accepted).
- Ngo-Doanh Nguyen, Akram Ben Ahmed, Abderazek Ben Abdallah, Khanh N. Dang, “Power-aware Neuromorphic Architecture with Partial Voltage Scaling 3D Stacking Synaptic Memory“, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 31, no. 12, pp. 2016-2029, Dec. 2023.
- Khanh N. Dang, Nguyen Anh Vu Doan, Abderazek Ben Abdallah “MigSpike: A Migration Based Algorithm and Architecture for Scalable Robust Neuromorphic Systems”, IEEE Transactions on Emerging Topics in Computing (TETC), [DOI: 10.1109/TETC.2021.3136028].
- Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran, “HotCluster: A thermal-aware defect recovery method for Through-Silicon-Vias Towards Reliable 3-D ICs systems”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, Volume 41, No. 4, pp. 799-812, April 2022. [DOI: 10.1109/TCAD.2021.3069370].
- Khanh N. Dang, Akram Ben Ahmed, Ben Abdallah Abderrazak and Xuan-Tu Tran, “TSV-OCT: A Scalable Online Multiple-TSV Defects Localization for Real-Time 3-D-IC Systems”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), IEEE, Volume 28, Issue 3, pp. 672 - 685, 2020. [DOI: 10.1109/TVLSI.2019.2948878].
- Khanh N. Dang, Akram Ben Ahmed, Yuichi Okuyama, Abderazek Ben Abdallah, “Scalable design methodology and online algorithm for TSV-cluster defects recovery in highly reliable 3D-NoC systems”, IEEE Transactions on Emerging Topics in Computing (TETC), IEEE, Volume 8, Issue 3, pp. 577-590, 2020. [DOI: 10.1109/TETC.2017.2762407].
- Khanh N. Dang, Akram Ben Ahmed, Xuan-Tu Tran, Yuichi Okuyama, Abderazek Ben Abdallah, “A Comprehensive Reliability Assessment of Fault-Resilient Network-on-Chip Using Analytical Model”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), IEEE, Volume 25, Issue 11, pp. 3099-3112, 2017. [DOI: 10.1109/TVLSI.2017.2736004].
For more details, please visit: https://u-aizu.ac.jp/~khanh/