A patent has been granted for a non-blocking multiple-TSV defects localization method and architecture for 3D-ICs by Prof. Ben Abdallah Abderazek and Prof. Dang Nam Khanh of the University of Aizu.

Please see more about this technology on the following webpage for reference.
https://www.u-aizu.ac.jp/misc/neuro-eng/3d-noc.html

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Title of the invention :An on-chip 3D system in which TSV groups containing multiple TSVs connect layers together/複数のTSVを含むTSVグループが層間を接続するオンチップの3次元システム.
Inventors : Ben Abdallah Abderazek (Computer Engineering Division) (*1)
       Dang Nam Khanh (Computer Engineering Division)(*2)
Filing date: May 29, 2020 [Application number] 2020-094220
Registration date: May 15, 2024 . Japanese Patent No.7488989
Link to patent :publication of applicationsJPB 007488989-000000.pdf

*1 Prof. BEN ABDALLAH Abderazek

*2 Prof. DANG Nam Khanh